Mitchell Arndt

The Serial Management Interface (SMI) Controller Project walks through the digital workflow from RTL to synthesis. The design is based on the IEEE 802.3 ethernet standard. More specifically, it implements Clause 22 direct (IEEE 802.3 section 22.2.4.5), Clause 45 direct (IEEE 802.3 section 45.3), and Clause 22 Access to Clause 45 Registers (explained in detail here). Further information about the communication protocol can be found here.

After the RTL implementation, the next stage was to verify the design. The initial strategy was to use a directed test bench for specific transaction sequences. To increase the coverage of the input space, UVM was used to conduct constrained, randomized testing of the SMI controller. The UVM structure contained a serial agent to generate a high level transaction, parse this transaction into mdio packets based on the protocol, and drive the serial channel to the device.

The final stage of this project was to synthesize the design. This was done using the DC NXT synthesis tool. The design was timing constrained to match the requirements of the production chip from Microchip.

The purpose of the Cache UVM Testbench project was to create a modular, reusable framework of testing components for the memory hierarchy for Purdue SoCET's RISCV Processor core. The main parts of the testbench can be split into the following components: Bus Agent, Bus Scoreboard/Predictor, and End2End Checker. The Bus Agent provides the core interfacing logic to communicate abstract cpu-transactions to the memory hierarchy. This involves reads, writes, and flush operations. The Bus Agent is extended to create a CPU Agent that drives these processor transactions to stress the various features of the RTL design. The Bus Scoreboard and Predictor pair to check the input side of any memory device (L1 cache, L2 cache, memory BFM). The End2End Checker ensures the proper translation of transactions as they propagate throughout the memory hierarchy.

This project is the result of an iterative design laboratory at Purdue University aimed at designing a microprocessor for the MIPS Instruction Set using System Verilog. The design started with a basic single cycle datapath. Following this, the datapath was split into Fetch, Decode, Execute, Memory, and Writeback stages for a simplified single core pipelined processor. From there, the following upgrades where added to the design: Hazard Detection, Forwarding, Memory Arbitration, Caching with a 2 way set associative data cache with LRU replacement and a direct mapped instruction cache, Branch Prediction using a Branch Table Buffer with 2-bit entries. At this point, the design branched from a single core to a multiprocessor with two identical cores. The coherency model was based on the MSI protocol with slight alterations such as cache to cache transfer for better memory access times. Furthermore, the multicore datapath was modified to include atomic Load-Linked and Store-Conditional operations. Additionally, parallel assembly code was written to test this system against a MIPS simulator against various algorithms such as MergeSort, Fibonacci, Multiplication through repeated Additions, and thread safe acquire/release lock operations.

The goal of this project is to create the most engaging and socially distanced version of Battleship, and our team has conceptualized a variety of ways to enhance the game experience while keeping its integrity. The first obstacle is to maintain social distancing. Our team plans to implement a connection between two battery-powered boards via WiFi from the ESP32 and web sockets, allowing for optimal and adjustable distancing. We will use a server to host the code for the gameplay logic, which validates legal plays on both boards. To reinvigorate gameplay, our team will engage with the players through touch, sight, and sound. Players will firmly place or lock-in, their boats on the boards at the beginning of the game and enter coordinates on a key pad to determine the attack location (depending on gameplay selection). For each “attack”, LEDs corresponding to hits or misses will flash on both players’ boards, creating a stronger visual appeal. When a boat is decimated, each setup will vibrate and audibly announce which boat has sunk, which will not only keep players interested but reproduce the incentive to win. Finally, to put a spin on the traditional playing style, we will create a variety of game modes. These different modes will allow players to play casually or competitively, quickly or for longevity. The various play options will further player interest simply by allowing the players to play towards an objective of their choice. To battle it out against your friends, visit the online version of the game here.

The purpose of this project is to implement a serial parsing microcontroller system to operate the steering, throttle, and braking functionality of the Autonomous Motorsport Purdue (AMP) go-kart. Autonomous racing has grown in popularity as more teams work to solve the unique problem of autonomous decision making at very high speeds. Our sub-team is working with the low-level electrical hardware on our modified go-kart, mainly focusing on parsing data from the onboard computer and distributing signals to other electronics such as the motor controller, linear actuator, and servos. To do this, the microcontroller receives custom serial packets from the go kart's computer to enable and then control the steering angle, throttle intensity, and brake position. The steering angl is set with a pulse width modulated (PWM) signal from the microcontroller. The throttle is controlled via the digital to analog converter (DAC) and the braking is set via digital signals. To reduce processing time the serial structure was designed to use byte long data instead of floating-point values because the microcontroller does not have dedicated floating-point hardware. Furthermore, we implemented various error handling methods for packet transmission such as cyclic redundancy check. This project is currently in its initial testing phase. We are testing the integration of our subsystems by controlling the serial input using a custom javascript-based simulator. The ultimate goal of this project is to have a fully autonomous go-kart that can navigate any track environment at the maximum speed possible.

Purdue Neurological Group (PNG) is involved in many different research projects, one of which involves measuring the effects of head trauma in athletes. More specifically, football helmet collisions. The goal of the project in regards to this repository is to design and implement high-speed data collection circuitry to measure the forces that take place during one of these football impacts (tackles). "Data collection circuitry" refers to the following:A microcontroller to read in analog inputs through an ADCVariable resistance strain gauges to measure forcesAnalog multiplexers to route 6 different signals into the microcontrollerDifferential amplifier / Wheatstone bridge to convert the sensor resistance changes into changes in voltage.SD card to record the data My contribution to this effort involves designing and programming the force collecting circuitry.

In the era of COVID and distance friendships, people need a method of connecting with individuals musically. Even in the absence of COVID, it is difficult to meet people with similar music tastes willing to attend a concert together. With Harmonize users will be able to easily connect with people and explore their music tastes. Unlike the vanilla services provided by Spotify, this will allow users to share their personal music style with the world and foster new friendships along the way. Harmonize is a one-stop-shop for online music socialization.

This Project is used to interface with the microcontroller for the Autonomous Motorsport Purdue go-kart. A key issue for the AMP team is the allocation of resources between the sub-teams. Due to the tight integration of our systems, both Electrical and Software sub-teams require access to the kart's main computer (Nvidia Jetson) and the electrical controller (Arduino MCU) for development/debugging tasks. To solve this issue, I created this Jetson Serial Simulator program. This software takes the place of the Jetson which allows for full electrical integration testing, without the need to schedule time with the physical Jetson computer.

This project used multiple peripheral systems of a STM32 microcontroller to recreate the infamous flappy bird game. The system shows the main content through an LCD display controlled through SPI communication with the microcontroller. There is also an additional 7 segment display to update the user's score. Finally, game music (the Tetris Theme Song) is output to the user by passing a variable duty cycle PWM signal through a hardware low pass filter.

This Project is used to create a control pad and scale to dispense adhesive until a weight limit is reached. E3 Displays uses various manufacturing processes when fabricating the customized display stacks for its customers. One of these processes involves using precise amounts of adhesive for bonding displays to cover glass. In the past, this has been a manual process, requiring operators to spend large amounts of time preparing the adhesive for the bonding process. This project automates this by bundling all the prep work into one location, controlled electronically.